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1 ? fn8177.2 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. xdcp is a trademark of intersil americas inc. copy right intersil americas inc. 2005. all rights reserved all other trademarks mentioned are the property of their respective owners. x9313 terminal voltages 5v, 32 taps digitally controlled potentiometer (xdcp?) the intersil x9313 is a digitally controlled potentiometer (xdcp). the device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. the wiper position is controlled by a 3-wire interface. the potentiometer is implemen ted by a resistor array composed of 31 resistive elements and a wiper switching network. between each element and at either end are tap points accessible to the wiper terminal. the position of the wiper element is controlled by the cs , u/d , and inc inputs. the position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. the device can be used as a th ree-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: ? control ? parameter adjustments ? signal processing features ? solid-state potentiometer ? 3-wire serial interface ? 32 wiper tap points - wiper position stored in nonvolatile memory and recalled on power-up ? 31 resistive elements - temperature compensated - end to end resistance range 20% - terminal voltages, -5v to +5v ? low power cmos -v cc = 3v or 5v - active current, 3ma max. - standby current, 500a max. ? high reliability - endurance, 100,000 data changes per bit - register data retention, 100 years ?r total values = 1k ? , 10k ? , 50k ? ? packages - 8 ld soic, msop and dip ? pb-free plus anneal available (rohs compliant) block diagrams 5-bit nonvolatile memory store and recall control circuitry one of decoder resistor array r h /v h u/d inc cs transfer gates thirty v cc v ss r l /v l r w /v w control up/down v cc (supply voltage) v ss (ground) r h /v h r w /v w r l /v l general detailed 0 1 2 28 29 30 31 two (u/d ) increment (inc ) device select (cs ) and memory 5-bit up/down counter data sheet september 9, 2005
2 fn8177.2 september 9, 2005 ordering information part number part marking v cc range (v) r total (k ? ) temperature range (c) package x9313um* 313u 4.5 to 5.5 50 0 to 70 8 ld msop x9313umz* (note) ddc 0 to 70 8 ld msop (pb-free) x9313umi* 13ui -40 to 85 8 ld msop x9313umiz* (note) ddb -40 to 85 8 ld msop (pb-free) x9313up x9313up 0 to 70 8 ld pdip x9313upi x9313up i -40 to 85 8 ld pdip x9313us* x9313u 0 to 70 8 ld soic x9313usz* (note) x9313u z 0 to 70 8 ld soic (pb-free) x9313usi* x9313u i -40 to 85 8 ld soic x9313usiz* (note) x9313u z i -40 to 85 8 ld soic (pb-free) x9313usm 0 to 70 8 ld soic x9313wm* 313w 10 0 to 70 8 ld msop x9313wmz* (note) ddf 0 to 70 8 ld msop (pb-free) x9313wmi* 13wi -40 to 85 8 ld msop x9313wmiz* (note) dde -40 to 85 8 ld msop (pb-free) x9313wp x9313wp 0 to 70 8 ld pdip x9313wpi x9313xp i -40 to 85 8 ld pdip x9313ws* x9313ws 0 to 70 8 ld soic x9313wsz* (note) x9313w z 0 to 70 8 ld soic (pb-free) x9313wsi* x9313ws i -40 to 85 8 ld soic x9313wsiz* (note) x9313ws z i -40 to 85 8 ld soic (pb-free) x9313wsmt2 x9313ws m 0 to 70 8 ld soic tape and reel x9313zm* 313z 0 to 70 8 ld msop x9313zmz* (note) ddj 0 to 70 8 ld msop (pb-free) x9313zmi* 13zi 1 -40 to 85 8 ld msop x9313zmiz* (note) ddh -40 to 85 8 ld msop (pb-free) x9313zp x9313zp 0 to 70 8 ld pdip x9313zpi x9313zp i -40 to 85 8 ld pdip x9313zs* x9313zs 0 to 70 8 ld soic x9313zsz* (note) x9313 z 0 to 70 8 ld soic (pb-free) x9313zsi* x9313zs i -40 to 85 8 ld soic x9313zsiz* (note) x9313zs z i -40 to 85 8 ld soic (pb-free) x9313
3 fn8177.2 september 9, 2005 x9313um-3* 13ud 3 to 5.5 50 0 to 70 8 ld msop x9313umz-3* (note) ddd 0 to 70 8 ld msop (pb-free) x9313umi-3* 13ue -40 to 85 8 ld msop x9313umiz-3* (note) 13ue z -40 to 85 8 ld msop (pb-free) x9313up-3 x9313up d 0 to 70 8 ld pdip x9313us-3* x9313u d 0 to 70 8 ld soic x9313usz-3* (note) x9313u z d 0 to 70 8 ld soic (pb-free) x9313wm-3* 13wd 10 0 to 70 8 ld msop x9313wmz-3* (note) ddg 0 to 70 8 ld msop (pb-free) x9313wmi-3* 13we -40 to 85 8 ld msop x9313wmiz-3* (note) 13we z -40 to 85 8 ld msop (pb-free) x9313wp-3 x9313wp d 0 to 70 8 ld pdip x9313ws-3* x9313w d 0 to 70 8 ld soic x9313wsz-3* (note) x9313w z d 0 to 70 8 ld soic (pb-free) x9313zm-3* 13zd 1 0 to 70 8 ld msop x9313zmz-3* (note) ddk 0 to 70 8 ld msop (pb-free) x9313zmi-3* 13ze -40 to 85 8 ld msop x9313zmiz-3* (note) 13ze z -40 to 85 8 ld msop (pb-free) x9313zp-3 x9313zp d 0 to 70 8 ld pdip x9313zs-3* x9313z d 0 to 70 8 ld soic x9313zsz-3* (note) x9313z z d 0 to 70 8 ld soic (pb-free) x9313zsi-3* x9313z e -40 to 85 8 ld soic x9313zsiz-3* (note) x9313z z e -40 to 85 8 ld soic (pb-free) note: intersil pb-free plus anneal products employ special pb-free material sets; mo lding compounds/die attach materials and 100 % matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free p roducts are msl classified at pb-free peak reflow temper atures that meet or exceed the pb-free requirements of ipc/jedec j std-020. *add "t1" suffix for tape and reel. ordering information (continued) part number part marking v cc range (v) r total (k ? ) temperature range (c) package x9313
4 fn8177.2 september 9, 2005 pin descriptions r h /v h and r l /v l the high (r h /v h ) and low (r l /v l ) terminals of the x9313 are equivalent to the fixed terminals of a mechanical potentiometer. the terminology of r l /v l and r h /v h references the relative position of the terminal in relation to wiper movement directi on selected by the u/d input and not the voltage potential on the terminal. r w /v w r w /v w is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. the position of the wiper within the array is determined by the control inputs. the wiper terminal series resistance is typically 40 ? at v cc = 5v. up/down (u/d ) the u/d input controls the direction of the wiper movement and whether the counter is incremented or decremented. increment (inc ) the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the u/d input. chip select (cs ) the device is selected when the cs input is low. the current counter value is stored in nonvolatile memory when cs is returned high while the inc input is also high. after the store operation is complete the x9313 will be placed in the low power standby mode until the device is selected once again. pin configuration principles of operation there are three sections of the x9313: the input control, counter and decode section; the nonvolatile memory; and the resistor array. the input cont rol section operates just like an up/down counter. the output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. under the proper conditions the contents of t he counter can be stored in nonvolatile memory and retained for future use. the resistor array is comprised of 31 individual resistors connected in series. at either end of the array and between each resistor is an electronic switch that tr ansfers the potential at that point to the wiper. the wiper, when at either fi xed terminal, acts like its mechanical equivalent and does not move beyond the last position. that is, the counter does not wrap around when clocked to either extreme. the electronic switches on the device operate in a ?make before break? mode when the wiper changes tap positions. if the wiper is moved several positions, multiple taps are connected to the wiper for t iw (inc to v w change). the r total value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. when the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory. when power is restored, the contents of the memory are recalled and the wiper is set to the value last stored. instructions and programming the inc , u/d and cs inputs control the movement of the wiper along the resistor array. with cs set low the device is selected and enabled to respond to the u/d and inc inputs. high to low transitions on inc will increment or decrement (depending on the state of the u/d input) a seven bit counter. the output of this counter is decoded to select one of thirty two wiper positions along the resistive array. the value of the counter is stored in nonvolatile memory whenever cs transitions high while the inc input is also high. v cc cs inc u/d r h /v h v ss 1 2 3 4 8 7 6 5 x9313 8-lead dip/soic r l /v l r w /v w v cc cs u/d r h /v h 1 2 3 4 8 7 6 5 x9313 8-lead msop r l /v l r w /v w inc v ss table 1. pin names symbol description r h /v h high terminal r w /v w wiper terminal r l /v l low terminal v ss ground v cc supply voltage u/d up/down control input inc increment control input cs chip select control input x9313
5 fn8177.2 september 9, 2005 the system may select the x9313, move the wiper and deselect the device without havi ng to store the latest wiper position in nonvolatile memory. after the wiper movement is performed as described above and once the new position is reached, the system must keep inc low while taking cs high. the new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. this procedure allo ws the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. the adjustments might be based on user preference, system parameter changes due to temperature drift, etc. the state of u/d may be changed while cs remains low. this allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. symbol table table 2. mode selection cs inc u/d mode l h wiper up l l wiper down h x store wiper position h x x standby current l x no store, return to standby l h wiper up (not recommended) l l wiper down (not recommended) waveform inputs outputs must be steady will be steady may change from low to high will change from low to high may change from high to low will change from high to low don?t care: changes allowed changing: state not known n/a center line is high impedance x9313
6 fn8177.2 september 9, 2005 absolute maximum ratings recommended operating conditions temperature under bias . . . . . . . . . . . . . . . . . . . . .-65c to +135c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c voltage on cs , inc , u/d , and v cc with respect to v ss . . . . . . . . . . . . . . . . . . . . . . . . -1v to +7v voltage on v h , v l , v w with respect to v ss . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6v to +7v ? v = |v h - v l |: x9313z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4v x9313w, x9313u . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10v lead temperature (soldering 10 seconds) . . . . . . . . . . . . . . . 300c i w (10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8.8ma temperature: commercial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0c to +70c industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to +85c supply voltage (vcc): x9313 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5v 10% x9313-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3v to 5.5v caution: stresses above those listed under ?absolute maximum rati ngs? may cause permanent damage to the device. this is a stres s rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. exposure to absolute maximum rating conditions for extend ed periods may affect device reliability. potentiometer characteristics over recommended operating conditions unless otherwise stated. symbol parameter test conditions/notes limits unit min typ max end-to-end resistance tolerance 20 % v vh v h terminal voltage -5 +5 v v vl v l terminal voltage -5 +5 v power rating r total 10k ? 10 mw r total 1k ? 16 mw r w wiper resistance i w = 1ma, v cc = 5v 40 100 w i w wiper current 4.4 ma noise ref: 1khz -120 dbv resolution 3% absolute linearity (note 1) r w(n)(actual) - r w(n)(expected) 1 mi (note 3) relative linearity (note 2) r w(n+1) - (r w(n) +mi) 0.2 mi (note 3) r total temperature coefficient 300 ppm/c ratiometric temperature coefficient 20 ppm/c c h /c l /c w potentiometer capacitances see circuit #3 10/10/25 pf notes: 1. absolute linearity is utilized to determine actual wiper voltage ve rsus expected voltage = (v w(n)(actual) - v w(n)(expected) ) = 1 mi maximum. 2. relative linearity is a measure of the error in step size between taps = r w(n+1) - (r w(n) + mi) = 0.2 mi. 3. 1 mi = minimum increment = r tot / 31. x9313
7 fn8177.2 september 9, 2005 dc operating characteristics over recommended operating condi tions unless otherwise stated. symbol parameter test conditions/notes limits unit min typ (note 4) max i cc v cc active current cs = v il , u/d = v il or v ih and inc = 0.42 / 2.4v @ max t cyc 13ma i sb standby supply current cs = v cc - 0.3v, u/d and inc = v ss or v cc - 0.3v 200 500 a i li cs , inc , u/d input leakage current v in = v ss to v cc 10 a v ih cs , inc , u/d input high current 2 v cc + 1 v v il cs , inc , u/d input low current -1 +0.8 v c in cs , inc , u/d input capacitance v cc = 5v, v in = v ss , ta = 25c, f = 1mhz 10 pf notes: 4. typical values are for ta = 25c and nominal supply voltage. 5. this parameter is periodically sampled and not 100% tested. endurance and data retention parameter min unit minimum endurance 100,000 data changes per bit per register data retention 100 years figure 1. test circuit #1 figure 2. test ci rcuit #2 figure 3. circuit #3 spice macro model test point v w /r w v h /r h v l /r l v s force current vw test point v h /r h v w /r w v l /r l c h c l r w 10pf 10pf r h r l r total c w 25pf ac conditions of test input pulse levels 0v to 3v input rise and fall times 10ns input reference levels 1.5v x9313
8 fn8177.2 september 9, 2005 power-up and -down requirements the recommended power-up sequence is to apply v cc /v ss first, then the potentiometer voltages. during power-up, the data sheet parameters for the dcp do not fully apply until 1 millisecond after v cc reaches its final value. the v cc ramp spec is always in effect. in order to prevent unwanted tap position changes, or an inadv ertent store, bring the cs and inc high before or concurrently with the v cc pin on power- up. ac timing ac operating characteristics over recommended operating conditions unless otherwise stated. symbol parameter limits unit min typ (note 6) max t ci cs to inc setup 100 ns t id inc high to u/d change 100 ns t di u/d to inc setup 2.9 s t il inc low period 1 s t ih inc high period 1 s t ic inc inactive to cs inactive 1 s t cph cs deselect time (store) 20 ms t cph cs deselect time (no store) 100 ns t iw inc to v w change 1 5 s t cyc inc cycle time 4 s t r , t f (note 7) inc input rise and fall time 500 s t pu (note 7) power-up to wiper stable 5s t r v cc (note 7) v cc power-up rate 0.2 50 v/ms t wr store cycle 510ms notes: 6. typical values are for t a = 25c and nominal supply voltage. 7. this parameter is not 100% tested. cs inc u/d v w t ci t il t ih t cyc t id t di t iw mi (see note) t ic t cph t f t r 10% 90% 90% note: mi in the ac timing diagram refers to the minimum incremental change in the v w output due to a change in the wiper position. x9313
9 fn8177.2 september 9, 2005 applications information electronic digitally controlled potentiometers (xdcp) provide three powerful application advan tages; (1) the variability and reliability of a solid-state potent iometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity of nonvolatile memory used fo r the storage of multiple potentiometer settings or data. basic configurations of electronic potentiometers basic circuits v r v w /r w v r i three-terminal potentiometer; variable voltage divider two-terminal variable resistor; variable current v h v l cascading techniques buffered reference voltage ? + +5v r 1 +v -5v v w v ref v out op-07 v w v w /r w +v +v +v x (a) (b) v out = v w /r w noninverting amplifier + ? v s v o r 2 r 1 v o = (1 + r 2 / r 1 )v s lm308a voltage regulator r 1 r 2 i adj v o (reg) = 1.25v (1 + r 2 / r 1 ) + i adj r 2 v o (reg) v in 317 offset voltage adjustment + ? v s v o r 2 r 1 100k ? 10k ? 10k ? 10k ? -12v +12v tl072 comparator with hysteresis v ul = [r 1 / (r 1 + r 2 )] v o (max) v ll = [r 1 / (r 1 + r 2 )] v o (min) + ? v s v o r 2 r 1 } } lt311a +5v -5v (for additional circuits see an115) x9313
10 fn8177.2 september 9, 2005 packaging information 0.118 0.002 (3.00 0.05) 0.040 0.002 (1.02 0.05) 0.150 (3.81) ref. 0.193 (4.90) 0.030 (0.76) 0.036 (0.91) 0.032 (0.81) 0.007 (0.18) 0.005 (0.13) 0.008 (0.20) 0.004 (0.10) 0.0216 (0.55) 7 typ. r 0.014 (0.36) 0.118 0.002 (3.00 0.05) 0.012 + 0.006 / -0.002 (0.30 + 0.15 / -0.05) 0.0256 (0.65) typ. 8-lead miniature small outline gull wing package type m note all dimensions in inches and (millimeters 0.220" 0.0256" typical 0.025" typical 0.020" typical 8 places footprint ref. x9313
11 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn8177.2 september 9, 2005 packaging information 0.150 (3.80) 0.158 (4.00) 0.228 (5.80) 0.244 (6.20) 0.014 (0.35) 0.019 (0.49) pin 1 pin 1 index 0.010 (0.25) 0.020 (0.50) 0.050 (1.27) 0.188 (4.78) 0.197 (5.00) 0.004 (0.19) 0.010 (0.25) 0.053 (1.35) 0.069 (1.75) (4x) 7 0.016 (0.410) 0.037 (0.937) 0.0075 (0.19) 0.010 (0.25) 0 - 8 x 45 8-lead plastic small outline gull wing package type s note: all dimensions in inches (in parentheses in millimeters) 0.250" 0.050"typical 0.050" typical 0.030" typical 8 places footprint x9313
x9313 printer friendly version digitally controlled potentiometer (xdcp?), linear, 32 taps, 3 wire interface, terminal voltages v cc datasheets, related docs & simulations description key features parametric data application diagrams related devices ordering information part no. design-in status temp. package msl price us $ x9313um active comm 8 ld msop 1 1.53 x9313um-3 active comm 8 ld msop 1 1.68 x9313um-3t1 active comm 8 ld msop t+r 1 1.68 x9313um-3t2 active comm 8 ld msop t+r 1 1.75 x9313um-3t5c6985 active comm 8 ld msop t+r 1 x9313umi active ind 8 ld msop 1 1.92 x9313umi-3 active ind 8 ld msop 1 2.08 x9313umi-3c7886 active ind 8 ld msop 1 x9313umi-3t1 active ind 8 ld msop t+r 1 2.08 X9313UMI-3T1C7886 active ind 8 ld msop t+r 1 x9313umit1 active ind 8 ld msop t+r 1 1.92 x9313umiz active ind 8 ld msop 2 1.92 x9313umiz-3 active ind 8 ld msop 2 2.08 x9313umiz-3t1 active ind 8 ld msop 2 2.08 x9313umizt1 active ind 8 ld msop t+r 2 1.92 x9313umt1 active comm 8 ld msop t+r 1 1.53 x9313umz active comm 8 ld msop 2 1.53 x9313umz-3 active comm 8 ld msop 2 1.68 x9313umz-3t1 active comm 8 ld msop t+r 2 1.68 x9313umzt1 active comm 8 ld msop t+r 2 1.53 x9313up active comm 8 ld pdip n/a 1.30 x9313up-3 active comm 8 ld pdip n/a 1.44 x9313upi active ind 8 ld pdip n/a 1.62 x9313us active comm 8 ld soic 1 1.30 x9313us-3 active comm 8 ld soic 1 1.44 x9313us-3t1 active comm 8 ld soic t+r 1 1.44 x9313us-3t2 active comm 8 ld soic t+r 1 1.44 x9313usc7975 active comm 8 ld soic 1 x9313usi active ind 8 ld soic 1 1.62 x9313usi-3c7711 active ind 8 ld soic 1 x9313usic7975 active ind 8 ld soic 1 x9313usit1 active ind 8 ld soic t+r 1 1.62 x9313usiz active ind 8 ld soic 1 1.62
x9313usizt1 active ind 8 ld soic t+r 1 1.62 x9313usm active comm 8 ld soic 1 7.13 x9313ust1 active comm 8 ld soic t+r 1 1.30 x9313ust2 active comm 8 ld soic t+r 1 1.36 x9313usz active comm 8 ld soic 1 1.30 x9313usz-3 active comm 8 ld soic 1 1.44 x9313usz-3t1 active comm 8 ld soic t+r 1 1.44 x9313uszt1 active comm 8 ld soic t+r 1 1.30 x9313wm active comm 8 ld msop 1 1.53 x9313wm-3 active comm 8 ld msop 1 1.68 x9313wm-3c7711 active comm 8 ld msop 1 x9313wm-3t1 active comm 8 ld msop t+r 1 1.68 x9313wm-3t1c6985 active comm 8 ld msop 1 x9313wm-3t2 active comm 8 ld msop t+r 1 1.68 x9313wmi active ind 8 ld msop 1 1.92 x9313wmi-3 active ind 8 ld msop 1 2.43 x9313wmi-3c7886 active ind 8 ld msop 1 x9313wmi-3t1 active ind 8 ld msop t+r 1 2.43 x9313wmi-3t1c7886 active ind 8 ld msop 1 x9313wmit1 active ind 8 ld msop t+r 1 1.92 x9313wmiz active ind 8 ld msop 2 1.92 x9313wmiz-3 active ind 8 ld msop 2 2.43 x9313wmiz-3c7886 active ind 8 ld msop 2 x9313wmiz-3t1 active ind 8 ld msop t+r 2 2.44 x9313wmiz-3t1c7886 active ind 8 ld msop t+r 2 x9313wmizt1 active ind 8 ld msop t+r 2 1.92 x9313wmt1 active comm 8 ld msop t+r 1 1.53 x9313wmz active comm 8 ld msop 2 1.53 x9313wmz-3 active comm 8 ld msop 2 1.68 x9313wmz-3t1 active comm 8 ld msop t+r 2 1.68 x9313wmzt1 active comm 8 ld msop t+r 2 1.53 x9313wp active comm 8 ld pdip n/a 1.30 x9313wp-3 active comm 8 ld pdip n/a 1.44 x9313wpi active ind 8 ld pdip n/a 1.62 x9313wpiz active ind 8 ld pdip n/a 1.62 x9313wpz-3 active ind 8 ld pdip n/a 1.44 x9313ws active comm 8 ld soic 1 1.30 x9313ws-3 active comm 8 ld soic 1 1.44 x9313ws-3t1 active comm 8 ld soic t+r 1 1.44 x9313ws-3t2 active comm 8 ld soic t+r 1 1.44 x9313wsc7576 active comm 8 ld soic 1 x9313wsc7898 active comm 8 ld soic 1 x9313wsc7975 active comm 8 ld soic 1
x9313wsi active ind 8 ld soic 1 1.62 x9313wsi-3c7711 active ind 8 ld soic 1 x9313wsit1 active ind 8 ld soic t+r 1 1.62 x9313wsit2 active ind 8 ld soic t+r 1 1.63 x9313wsiz active ind 8 ld soic 1 1.63 x9313wsizt1 active ind 8 ld soic 1 1.63 x9313wsmt2 active comm 8 ld soic 1 2.02 x9313wst1 active comm 8 ld soic t+r 1 1.30 x9313wst1c7576 active comm 8 ld soic 1 x9313wst2 active comm 8 ld soic 1 1.31 x9313wsz active comm 8 ld soic 1 1.31 x9313wsz-3 active comm 8 ld soic 1 1.44 x9313wsz-3t1 active comm 8 ld soic t+r 1 1.44 x9313wszt1 active comm 8 ld soic t+r 1 1.31 x9313zm active comm 8 ld msop 1 1.53 x9313zm-3 active comm 8 ld msop 1 1.68 x9313zm-3c7711 active comm 8 ld msop 1 x9313zm-3t1 active comm 8 ld msop 1 1.68 x9313zmi active ind 8 ld msop 1 1.92 x9313zmi-3 active ind 8 ld msop 1 1.92 x9313zmi-3t1 active ind 8 ld msop t+r 1 1.92 x9313zmit1 active ind 8 ld msop t+r 1 1.92 x9313zmit2 active ind 8 ld msop t+r 1 1.92 x9313zmiz active ind 8 ld msop 2 1.92 x9313zmiz-3 active ind 8 ld msop 2 1.92 x9313zmiz-3t1 active ind 8 ld msop t+r 2 1.92 x9313zmizt1 active ind 8 ld msop t+r 2 1.92 x9313zmt1 active comm 8 ld msop t+r 1 1.53 x9313zmz active comm 8 ld msop 2 1.53 x9313zmz-3 active comm 8 ld msop 2 1.68 x9313zmz-3t1 active comm 8 ld msop t+r 2 1.68 x9313zmzt1 active comm 8 ld msop t+r 2 1.92 x9313zp active comm 8 ld pdip n/a 1.30 x9313zp-3 active comm 8 ld pdip n/a 1.44 x9313zpc7975 active comm 8 ld pdip t+r n/a x9313zpi active ind 8 ld pdip n/a 1.62 x9313zpiz active ind 8 ld pdip n/a 1.62 x9313zpz-3 active ind 8 ld pdip n/a 1.44 x9313zs active comm 8 ld soic 1 1.03 x9313zs-3 active comm 8 ld soic 1 1.14 x9313zs-3t1 active comm 8 ld soic t+r 1 1.14 x9313zs-3t2 active comm 8 ld soic t+r 1 1.14 x9313zsi active ind 8 ld soic 1 1.62
x9313zsi-3 active ind 8 ld soic 1 1.62 x9313zsi-3c7711 active ind 8 ld soic 1 x9313zsi-3t1 active ind 8 ld soic t+r 1 1.62 x9313zsit1 active ind 8 ld soic t+r 1 1.62 x9313zsiz active ind 8 ld soic t+r 1 1.62 x9313zsiz-3 active ind 8 ld soic 1 1.63 x9313zsiz-3t1 active ind 8 ld soic t+r 1 1.63 x9313zsizt1 active ind 8 ld soic t+r 1 1.62 x9313zst1 active ind 8 ld soic t+r 1 1.30 x9313zst1c7975 active comm 8 ld soic t+r 1 x9313zst2 active comm 8 ld soic t+r 1 1.30 x9313zsz active comm 8 ld soic 1 1.30 x9313zsz-3 active comm 8 ld soic 1 1.44 x9313zsz-3t1 active comm 8 ld soic t+r 1 1.44 x9313zszt1 active comm 8 ld soic t+r 1 1.30 xlabview01 active n/a 91.77 xlabview01z active eval board n/a 91.77 x9313usz-3t2 coming soon comm 8 ld soic t+r 1 x9313wszt2 coming soon comm 8 ld soic 1 x9313zmizt2 coming soon ind 8 ld msop t+r 2 x9313zszt2 coming soon comm 8 ld soic t+r 1 x9313tm inactive comm 8 ld msop 1 x9313tm-3 inactive comm 8 ld msop 1 x9313tm-3t1 inactive comm 8 ld msop t+r 1 x9313tm-3t2 inactive comm 8 ld msop t+r 3 x9313tmi inactive ind 8 ld msop 1 x9313tmit1 inactive ind 8 ld msop t+r 1 x9313tmt1 inactive comm 8 ld msop t+r 1 x9313tp inactive comm 8 ld pdip n/a x9313tp-3 inactive comm 8 ld pdip n/a x9313tpi inactive ind 8 ld pdip n/a x9313ts inactive comm 8 ld soic 1 x9313ts-3 inactive comm 8 ld soic 1 x9313ts-3c7309 inactive comm 8 ld soic 1 x9313ts-3c7898 inactive comm 8 ld soic 1 x9313ts-3c7975 inactive comm 8 ld soic 1 x9313ts-3t1 inactive comm 8 ld soic t+r 1 x9313ts-3t1c7975 inactive comm 8 ld soic 1 x9313ts-3t2 inactive comm 8 ld soic t+r 3 x9313ts-3t4 inactive comm 8 ld soic t+r 3 x9313tsc6683 inactive comm 8 ld soic 1 x9313tsc7309 inactive comm 8 ld soic 1 x9313tsc7708 inactive comm 8 ld soic 1 x9313tsc7898 inactive comm 8 ld soic 1 x9313tsi inactive ind 8 ld soic 1
x9313tsi-3 inactive ind 8 ld soic 1 x9313tsi-3c7711 inactive ind 8 ld soic 1 x9313tsic6683 inactive ind 8 ld soic 1 x9313tsic7711 inactive ind 8 ld soic 1 x9313tsit1 inactive ind 8 ld soic t+r 1 x9313tst1 inactive comm 8 ld soic t+r 1 x9313tst2 inactive comm 8 ld soic t+r 3 x9313umi-3t5c7886 inactive ind 8 ld msop 1 x9313umz-3t2 inactive comm 8 ld msop 2 x9313usit4 inactive ind 8 ld soic t+r 3 x9313ust4 inactive comm 8 ld soic t+r 3 x9313uszt2 inactive comm 8 ld soic t+r x9313wm-3-e2c7898 inactive comm 8 ld msop 1 x9313wm-3t5c6985 inactive comm 8 ld msop 1 x9313wmz-3t2 inactive comm 8 ld msop t+r 2 x9313wsi-e2 inactive ind 8 ld soic 1 x9313wsi-e2c7898 inactive ind 8 ld soic 1 x9313wsit1-e2 inactive ind 8 ld soic 1 x9313wsit4 inactive ind 8 ld soic t+r 3 x9313wsizt2 inactive ind 8 ld soic t+r x9313wsz-3t2 inactive comm 8 ld soic t+r x9313zmi-e2c7898 inactive ind 8 ld msop 1 x9313zs-3t3 inactive comm 8 ld soic t+r 3 the price listed is the manufacturer's suggested retail price for quantities between 100 and 999 units. however, prices in today's market are fluid and may change without notice. msl = moisture sensitivity level - per ipc/jedec j-std-020 smd = standard microcircuit drawing description the intersil x9313 is a digitally controlled potentiometer (xdcp). the device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. the wiper position is controlled by a 3-wire interface. the potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. between each element and at either end are tap points accessible to the wiper terminal. the position of the wiper element is controlled by the cs , u/ d , and inc inputs. the position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. the device can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: control parameter adjustments signal processing key f eatures solid-state potentiometer 3-wire serial interface 32 wiper tap points wiper position stored in nonvolatile memory and recalled on power-up 31 resistive elements temperature compensated end to end resistance range 20% terminal voltages, -v cc to +v cc low power cmos v cc = 3v or 5v active current, 3ma max.
standby current, 500 a max. high reliability endurance, 100,000 data changes per bit register data retention, 100 years rtotal values = 1k , 10k , 50k packages 8 ld soic, 8 ld msop and 8 ld pdip pb-free plus anneal available (rohs compliant) related documentation application note(s): a compendium of application circuits for intersil?s digitally-controlled (xdcp) potentiometers a primer on digitally-controlled potentiometers application of intersil digitally controlled potentiometers (xdcp?) as hybrid analog/digital feedback system control elements dc/dc module trim with digital potentiometers designing power supplies using intersil?s xdcp mixed signal products power supply and dc to dc converter control using intersil digitally controlled potentiontiometers (xdcps) putting analog on the bus shaft encoder drives multiple intersil digitally controlled potentiontiometers (xdcps) tone, balance, and volume control using a quad xdcp working with the intersil 3-wire dcp devices datasheet(s): digitally controlled potentiometer (xdcp?), linear, 32 taps, 3 wire interface, terminal voltages v cc technical brief(s): converting a fixed pwm to an adjustable pwm evaluation board(s): evaluation circuits for xdcp? intersil_xdcp_test_utility_manual_rev_3.2.3.pdf labview_xdcp_software.zip labview_xdcp_upgrade_3.2.3.zip readme_xicorlabview_v3.2.3.txt xdcp_vref evaluation board kit documentation and software accesshw.zip technical homepage: digitally controlled potentiometers (dcps) and capacitors (dccs) precision analog homepage parametric data number of dcps single number of taps 32 memory type non-volatile bus interface type 3-wire (up/down) resistance options (k ) 1, 10, 50 v cc range (v) 3.0 to 5.5 dcp differential terminal voltage (v) 10 terminal voltage range v l to v h (v) -v cc to +v cc resistance taper linear wiper current (ma) 1 wiper resistance ( ) 40 standby current i sb ( a) 500 application block diagrams digital projector related devices parametric table
x9314 single digitally controlled potentiometer (xdcp?) x9315 digitally controlled potentiometer (xdcp?) x93154 digitally controlled potentiometer (xdcp?) x93155 digitally controlled potentiometer (xdcp?) x93156 single digitally controlled potentiometer (xdcp?), low noise, low power, 3 wire up/down, 32 taps x9511 single digitally-controlled (xdcp?) potentiometer (push button controlled) about us | careers | contact us | investors | legal | privacy | site map | subscribe | intranet ?2007. all rights reserved.

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